R&D (FilterCavity)
MarcEisenmann - 22:52, Wednesday 01 May 2024 (3543)
recabling and DDS2 issue

[Logan,Marc,Michael]

We took time to check all electronic connections and are now preparing a summary scheme.

During this activity, we also reconnected the 2 missing GRMC/CCFC cables.

We also replaced the broken CC PLL MON cable that was previously broken.

We could lock SHG in similar condition as before (large HOM) but could not lock GRMC despite relatively reasonable alignment.

THe issue is that DDS2 is not detecting the 500MHz clock signal while it is fine for DDS1 and 3.

We are now sending -20.5dBm clock to DDS2. To be further investigated