Summary

I measured the phase noise of the P-Pol PLL at 50 MHz (normal operation ~200 MHz) and of the CC PLL at 20 MHz (normal operation 7 MHz). Despite the CC PLL instability, the phase noise measurement is not so bad and basically consistent with previous measurements of PLL phase noise. I am guesing that there is an issue of glitches at the normal CC operation frequency because it is much more unstable at 7 MHz than the test frequency of 20 MHz.

Details

I measured the PLL phase noise of both the CC and PPol controls using the method outlined previously. Normally, these loops operate at 7 MHz and ~ 200 MHz, respectively, but this is for the output of the PLL control loop. In the digital system, we input 3x F for CC into DDS3 DAC0, i.e. 21 MHz -> 7 MHz, and (1/5)x F for PPol into DDS3 DAC1, i.e. 35 MHz -> 175 MHz (currently). However, the DDS3 board is mis-wired so DAC3 controls the PPol LO while DAC1 controls the homodyne. For measuring the PLL phase noise, the DDS system is cleanest below 100 MHz, so instead I measured the PPol phase noise using at 50 MHz and the CC at 20 MHz.

The principle behind the PLL phase noise measurement is described in Yuhang's thesis, pg 102. When we input a PLL beatnote and a local oscillator to a mixer at the same frequency we will be left with PLL phase noise. The power spectrum is measured in Vrms/rtHz, so to convert to rad/rtHz we must divide by a calibration factor Apk^2, where Apk is the peak to peak amplitude of the oscillating output of the mixer when the beatnote and LO are offset by some small frequency ~ 100 Hz. I use a small mixer MiniCircuits ZX05-1L-S+ which has a damage threshold of 17 dBm (50 mW at 50 Ohm). A local oscillator (either DAC0 or DAC3) goes into the LO port while the PLL [name] MON signal goes into the RF port. An SMA screw-on low pass filter is used at the output.

For the measurements I have the following inputs into the mixer:
CC 50 MHz LO 8.0 dBm, 50.000000 MHz on DDS and spectrum analyzer
PPol 50 MHz beatnote -17 dBm, 10.000000 MHz on DDS, 50.000000 MHz on spectrum analyzer
PPol 20 MHz LO 9.0 dBm, 20.000000 MHz on DDS, 19.913043 MHz on spectrum analyzer
CC 20 MHz beatnote -6 dBm, 60.000000 MHz on DDS, 20.030000 MHz on spectrum analyzer

The spectrum analyzer seems to be a bit inaccurate on peak finding. Oscillatory behaviour at the output of the mixer depends on frequency offset as set on the computer to the DDS and can be seen on the oscilloscope, rather than "as measured" on the spectrum analyzer peak finder.

For the spectral measurement I use PSD units Vrms/rtHz. I then convert to rad/rtHz using the Apk calibration factor, 0.0568 mVpk for the PPol and 0.0086 mVpk for the CC. The phase noise spectrum is shown in figure 1. They are compared with a previous measurement in September last year. It seems the CC phase noise at 20 MHz is not too bad. Both the PPol and CC loops remained locked for a long time during the test. However, the PLL lock for the CC was seen to be quite unstable at its normal operating frequency. Perhaps it is glitch noise rather than stationary noise, or maybe there is some cross coupling when operating at 7 MHz. PPol has about 50% extra noise in the range 500-2000 Hz. The difference at the lowest frequency is due to the frequency resolution of the measurement rather than the system.