R&D (FilterCavity)
NaokiAritomi - 22:15, Thursday 10 October 2019 (1734)
Tuning of binary number of CC PLL and CC1 demodulation frequency (CCFC)

[Matteo, Aritomi]

Yesterday we found low frequency oscillation of CC2 error signal and tuned frequency of CC PLL and CC1,2 demodulation frequency to remove this, but we found that binary number of these frequencies were different. Frequency difference between CC PLL and CC2 demodulation was actually 0.04Hz and this may cause low frequency oscillation of CC2 error signal. Then we tuned binary number of CC PLL and CC1 demodulation frequency. Current setting is as follows. I attached the pictures to be sure. Note that CC PLL frequency is divided by 3 at PLL board.

channel function frequency (MHz) binary number
CH0 CC PLL 20.99099988 1010101111110101010100010100
CH2 CC1 demod 13.99399992   111001010100011100010111000
CH3 CC2 demod   6.99699996     11100101010001110001011100

 

 

 

 

We'll check CC2 error signal and AOM frequency of CCSB next week.

Images attached to this report
1734_20191010151714_21mhz.jpg 1734_20191010151720_14mhz.jpg 1734_20191010151725_7mhz.jpg